AutoVecCoder: Teaching LLMs to Generate Explicitly Vectorized Code

TL;DR

AutoVecCoder is a new framework that enhances large language models to generate explicit vectorized code, improving performance over traditional compiler auto-vectorization methods.

Contribution

It introduces VecPrompt and VecRL, novel components that enable LLMs to produce high-quality, explicit SIMD vectorized code with state-of-the-art results.

Findings

AutoVecCoder-8B outperforms standard -O3 optimization in benchmarks.

The framework achieves state-of-the-art performance on SimdBench SSE and AVX subsets.

Generated code surpasses traditional auto-vectorization in some cases.

Abstract

Vectorization via Single Instruction, Multiple Data (SIMD) architectures is a cornerstone of high-performance computing. To fully exploit hardware potential, developers often resort to explicit vectorization using intrinsics, as compiler-based auto-vectorization frequently yields suboptimal results due to conservative static analysis. While Large Language Models (LLMs) have demonstrated remarkable proficiency in general code generation, they struggle with explicit vectorization due to the scarcity of high-quality corpora and the strict semantic constraints of low-level hardware instructions. In this paper, we propose AutoVecCoder, a novel framework designed to empower LLMs with the capability of automated explicit vectorization. AutoVecCoder integrates two core components: VecPrompt, an automated data synthesis pipeline to inject domain-specific intrinsic knowledge; and VecRL, a reinforcement learning framework that aligns code generation with execution efficiency. AutoVecCoder-8B trained by this framework achieves state-of-the-art performance on the SSE and AVX subsets of SimdBench and, in some cases, generates implementations surpassing standard -O3 optimizations, effectively overcoming the inherent bottlenecks of traditional automated vectorization.