Workload-Aware Early-Stage Power Delivery Network Optimization via Architectural Power Traces

TL;DR

This paper introduces a workload-aware approach for early-stage PDN optimization using architectural power traces, leading to more efficient designs with significant area reduction.

Contribution

It presents a novel methodology that incorporates realistic workload behavior into PDN planning, improving efficiency over traditional worst-case assumptions.

Findings

Achieves up to 32.94% reduction in PDN metal area.

Maintains IR drop and electromigration constraints.

Uses architectural simulations for fine-grained power activity analysis.

Abstract

Power Delivery Networks (PDNs) are critical for maintaining voltage integrity in modern multiprocessor systems. Conventional early-stage PDN planning relies on static or worst-case power assumptions, often leading to over-provisioned designs and inefficient use of routing resources. This paper proposes a workload-aware methodology for early-stage PDN optimization based on architectural power traces. Using architectural simulations, temporal power activity is captured at fine granularity and mapped to spatial power density distributions across the chip. These distributions are then translated into current demand profiles to guide PDN topology planning at tile granularity. By incorporating realistic workload behavior, the proposed approach enables adaptive PDN resource allocation during early design stages. Experimental results demonstrate that the method achieves up to 32.94% reduction in PDN metal area compared to conventional worst-case designs, while maintaining compliance with IR drop and electromigration constraints.