Heterogeneous SoC Integrating an Open-Source Recurrent SNN Accelerator for Neuromorphic Edge Computing on FPGA
Michelangelo Barocci, Vittorio Fra, Enrico Macii, Gianvito Urgese

TL;DR
This paper presents a heterogeneous FPGA-based System-on-Chip integrating an open-source Recurrent Spiking Neural Network accelerator, enabling low-power neuromorphic edge computing with validated classification and online learning capabilities.
Contribution
It introduces a flexible, open-source FPGA SoC design combining ReckOn SNN accelerator with RISC-V and ARM processors, facilitating accessible neuromorphic hardware development.
Findings
Reproduced classification results with FPGA implementation of ReckOn.
Validated online learning on Braille digit dataset.
Demonstrated equivalence in accuracy and physical implementation characteristics.
Abstract
The growing popularity of Spiking Neural Networks (SNNs) and their applications has led to a significant fast-paced increase of neuromorphic architectures capable of mimicking the spike-based data processing typical of biological neurons. The efficient power consumption and parallel computing capabilities of the SNNs lead researchers towards the development of digital accelerators, which exploit such features to bring fast and low-power computation on edge devices. The spread of digital neuromorphic hardware however is slowed down by the prohibitive costs that the silicon tape out of circuits brings, that's why targeting Field Programmable Gate Arrays (FPGAs) could represent a viable alternative, offering a flexible and cost-effective platform for implementing digital neuromorphic systems and helping the spread of open-source hardware designs. In this work we present an heterogeneous…
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