Low-Complexity Blind SNR Estimator for mmWave Multi-Antenna Communications

TL;DR

This paper introduces a low-complexity, single-sample blind SNR estimator for mmWave multi-antenna systems that leverages channel sparsity and is validated through FPGA implementation.

Contribution

It presents a novel single-sample blind estimator exploiting beamspace sparsity, with a hardware-efficient FPGA implementation demonstrating real-time performance.

Findings

Achieves high estimation accuracy compared to existing methods.

Demonstrates low-latency FPGA implementation with sublinear resource scaling.

Operates effectively without pilot signals or multiple observations.

Abstract

In this paper, we propose a low-complexity blind estimator for the average noise power, average signal power, and signal-to-noise ratio (SNR) in millimeter-wave (mmWave) massive multi-antenna uplink systems. In particular, the proposed method is designed to operate using only a single received signal sample, without relying on pilot signals, iterative optimization, or multiple observations, and without requiring prior knowledge of the transmitted signal. By exploiting the inherent sparsity of mmWave channels in the beamspace domain, the estimator identifies noise-dominant components through a sorting-based procedure combined with a finite-difference criterion. This separation is further supported by the order statistics of noise power under Gaussian assumptions, enabling statistically grounded discrimination between signal and noise elements. The average noise power is estimated from the identified noise-only components, and the signal power and SNR are subsequently obtained through simple arithmetic operations. The proposed algorithm achieves low computational complexity and is well-suited for real-time implementation. To demonstrate its practical feasibility, a hardware-efficient very large-scale integration (VLSI) architecture is developed and implemented on a AMD-Xilinx Kintex UltraScale+ KCU116 Evaluation Kit, with corresponding field-programmable gate array (FPGA) results provided. The implementation exhibits low latency and sublinear scaling of hardware resource utilization with respect to the number of antennas, and enables parameter estimation within a duration shorter than a single symbol of conventional wireless systems. Simulation results verify that the proposed estimator achieves high estimation accuracy compared to existing single-sample-based methods.