Comprehensive Design Validation of serially powered CMS Phase-2 Pixel Modules

TL;DR

This paper presents a comprehensive validation process for CMS Phase-2 pixel modules, including qualification and stress tests, to ensure performance and durability under HL-LHC conditions.

Contribution

It introduces a detailed design validation and quality control workflow for the CMS Phase-2 pixel modules, focusing on performance, robustness, and bump-bond durability.

Findings

Modules meet upgrade specifications in power and leakage current.

Stress tests demonstrate robustness and endurance of the module layout.

Thermal stress tests evaluate bump-bond strength under temperature gradients.

Abstract

After the Large Hadron Collider (LHC) upgrade into High Luminosity LHC (HL-LHC), the instantaneous luminosity is expected to reach values up to 7.5x10^34cm^2/s, causing a harsher radiation environment as well as a significant increase in data rate. The current CMS Tracker detector would not be able to operate under these conditions and it will be replaced by an upgraded version known as Phase-2. In view of the detector upgrade and as part of the design validation process, a Quality Control (QC) test flow has been developed to characterize the first pixel modules prototypes and evaluate their performance. The results of this procedure were the starting point for small design adjustments, especially for the the High Density Interconnect or HDI, the flexible low mass PCB that distributes power and signals to the module and controls the readout through a high speed data transmission channel. This talk includes qualification tests performed on the CMS Phase-2 design to ensure that all the pixel module components satisfy the upgrade specifications, for example in terms of power consumption and leakage current stability. Additionally, stress tests were conducted to probe the limits of the design, demonstrating the robustness and endurance of the module layout. Due to the differing material properties of the HDI copper layers and the silicon sensor and readout chip, temperature gradients induce different thermal expansion and contraction, resulting in mechanical stress on the bump-bond interface. For this reason, among the destructive measurements, dedicated thermal stress tests were carried out to evaluate the bump-bond strength and durability for different bump bonding techniques.