Design of Memristive Lightweight Encryption For In-Memory Image Steganography

TL;DR

This paper presents a memristive in-memory architecture integrating lightweight cryptography for secure, energy-efficient image steganography, reducing data transfer and hardware complexity.

Contribution

It introduces a novel memristive CIM architecture with optimized lightweight cipher implementations, lowering energy use and computational steps for secure in-memory image steganography.

Findings

Energy consumption reduced by up to 44% with the new data-shifting method.

Cryptographic hardware complexity decreased through efficient register data-shifting.

Performance demonstrated effectively in a steganography application.

Abstract

With the expansion of data-intensive applications and increasing data volumes, providing an efficient solution to address growing energy consumption and performance degradation caused by the transfer of large amounts of data between the processor and the main memory has become a severe challenge. The frequent transfer of large amounts of data between internal chip units, memories, and their interconnections exacerbates the vulnerability of the data being accessed. Employing a memristive Computation In-Memory-Array (CIM-A) architecture limits data transfer, thereby addressing both challenges. Furthermore, by integrating lightweight cryptography, developed to secure data in hardware-constrained devices, with CIM-A architectures, the security of data in transit, especially across interconnections, can be ensured. This paper implements two standard lightweight stream ciphers, Trivium and Grain-128a, for CIM using stateful material implication (IMPLY) logic to address these combined security and performance challenges. In addition to redesigning the cryptographic structures, we reduce the hardware complexity of conventional IMPLY-based implementations by proposing an efficient method for shifting data within the shift registers. Applying the proposed data-shifting method to the registers of these ciphers reduces the number of computational steps and decreases energy consumption by up to 42% and 44%, respectively, compared to conventional implementations. Finally, the performance of the proposed circuits is evaluated in a steganography application, demonstrating their practical efficiency.