Congestion-Aware Dynamic Axonal Delay for Spiking Neural Networks

TL;DR

This paper introduces a congestion-aware dynamic axonal delay mechanism for spiking neural networks, improving temporal task accuracy and reducing parameters by dynamically adjusting delays based on activity levels.

Contribution

It proposes a novel delay modulation method that combines static and dynamic components, enhancing adaptability and efficiency in SNNs.

Findings

Achieved 93.75% accuracy on SHD benchmark.

Reduced parameter count by about 50% compared to existing methods.

Improved spike alignment and temporal processing in SNNs.

Abstract

Spiking Neural Networks (SNNs) are widely regarded as an energy-efficient paradigm for modeling and processing temporal and event-driven information. Incorporating delays in SNNs has been proven to be an effective mechanism for improving spike alignment in event-driven tasks. However, existing delay learning approaches predominantly assign static delays to individual synapses, resulting in a large number of delay parameters and limited adaptability to input-dependent activity dynamics. To this end, we propose a Congestion-Aware Dynamic Axonal Delay (CADAD) mechanism, which decomposes the delay into a channel-wise static base delay for temporal structuring and a global, activity-conditioned shift that dynamically regulates the state update rate under varying spike intensities. The delay parameters are learned using differentiable linear interpolation and discretized at inference time, preserving the benefits of dynamic delay modulation while incurring only minimal additional cost. Experiments on speech benchmarks, including the Spiking Heidelberg Dataset, Spiking Speech Commands, and Google Speech Commands, demonstrate that introducing congestion-aware delays into synaptic signal transmission effectively improves accuracy on temporal tasks, notably achieving 93.75% accuracy on SHD, 80.69% accuracy on SSC, and 95.58% on GSC-35, while reducing the parameter count by approximately 50% compared to state-of-the-art delay-based methods with the same architecture.