A Semantic Quantum Circuit Cache for Scalable and Distributed Quantum-Classical Workflows

TL;DR

The paper presents a Quantum Circuit Cache that detects semantic equivalence in quantum circuits, significantly reducing redundant computations in hybrid workflows and improving efficiency across various hardware platforms.

Contribution

It introduces a novel content-addressable cache system combining ZX-calculus and graph hashing for deterministic circuit identification and reuse in distributed quantum-classical workflows.

Findings

Caching eliminates up to 91.98% of redundant subcircuit simulations.

Achieves up to 7.0 times speedup on a single node and 1.6 times with Redis at scale.

Real hardware validation shows an 11.2 times speedup on a 35-qubit QPU.

Abstract

Hybrid quantum--classical workflows often execute large ensembles of circuits that differ syntactically but implement identical operations, leading to substantial redundant computation. To address this, we introduce the Quantum Circuit Cache, a content-addressable system that detects semantic equivalence and reuses previously computed results across executions, backends, and workflow stages. Our approach combines ZX-calculus reduction with isomorphism-invariant Weisfeiler--Leman graph hashing to generate deterministic circuit identifiers, enabling constant-time lookup in distributed caches supporting both lightweight LMDB and scalable Redis deployments. The system integrates transparently into hybrid HPC workflows and remains backend-agnostic across CPU, GPU, and QPU environments. We evaluate the system on MareNostrum 5 with two representative workloads: distributed wire cutting and Differential Evolution-based QAOA optimization. For wire cutting, caching eliminates up to 91.98% of redundant subcircuit simulations, yielding speedups up to 7.0 times on a single node and maintaining advantages at scale, with Redis-based caching achieving up to 1.6 times speedups under high parallelism. Validation on a 35-qubit superconducting QPU confirms these benefits, achieving an 11.2 times speedup on real hardware. In distributed QAOA optimization, equivalence-aware caching avoids up to 27.6% of circuit evaluations and consistently reduces execution cost without altering the optimization algorithm. In both cases, reuse grows with concurrency and circuit structure, highlighting redundancy as a major systems bottleneck and demonstrating the effectiveness of our Quantum Circuit Cache.