Hardware-Efficient Hamiltonian Simulation via Trotter-Initialized Variational Optimization with Native Placement
F. S. Luiz, P. N. Ferreira, and M. C. de Oliveira

TL;DR
This paper presents a structure-aware compilation method for Hamiltonian simulation on NISQ devices that produces shallower, high-fidelity circuits by leveraging Hamiltonian structure and variational optimization.
Contribution
It introduces a novel framework combining native placement, adaptive Trotter block selection, and variational refinement for efficient Hamiltonian simulation.
Findings
Achieves fidelities >0.996 with near-linear entangling gate scaling.
Shorter approximate circuits outperform deeper exact ones on hardware.
Demonstrates practical Hamiltonian simulation without pulse-level control.
Abstract
Compiling time-evolution operators of the form into hardware-native gate sequences is a central bottleneck for digital quantum simulation on noisy intermediate-scale quantum (NISQ) devices. Generic transpilation treats as an arbitrary unitary, discarding the structure of Hamiltonian dynamics and producing circuits whose depth exceeds hardware coherence limits. We introduce a structure-aware compilation framework that treats product-formula decompositions as synthesis primitives rather than simulation approximations. The method combines (i) native placement of Hamiltonian terms onto the hardware coupling map, (ii) adaptive selection of Trotter blocks via a greedy discretization procedure, and (iii) variational refinement using a Trotter-initialized ansatz. Across Heisenberg, Ising, and XY models with -- qubits, the compiled circuits achieve fidelities…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
