Deployment-Aligned Low-Precision Neural Architecture Search for Spaceborne Edge AI
Parampuneet Kaur Thind, Vaibhav Katturu, Giacomo Zema, Roberto Del Prete

TL;DR
This paper introduces a hardware-aware neural architecture search method that incorporates low-precision training aligned with deployment constraints, significantly improving accuracy on low-precision edge AI hardware.
Contribution
It presents a novel deployment-aligned low-precision training approach integrated into NAS, enhancing robustness and accuracy without changing the search space.
Findings
Deployment-aligned training recovers two-thirds of accuracy loss due to low-precision conversion.
Achieves 0.826 mIoU on spaceborne vessel segmentation with low-precision hardware.
Post-training conversion drops performance from 0.85 to 0.78 mIoU, while the proposed method maintains higher accuracy.
Abstract
Designing deep networks that meet strict latency and accuracy constraints on edge accelerators increasingly relies on hardware-aware optimization, including neural architecture search (NAS) guided by device-level metrics. Yet most hardware-aware NAS pipelines still optimize architectures under full-precision assumptions and apply low-precision adaptation only after the search, leading to a mismatch between optimization-time behavior and deployment-time execution on low-precision hardware that can substantially degrade accuracy. We address this limitation by integrating deployment-aligned low-precision training directly into hardware-aware NAS. Candidate architectures are exposed to FP16 numerical constraints during fine-tuning and evaluation, enabling joint optimization of architectural efficiency and numerical robustness without modifying the search space or evolutionary strategy. We…
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