FPGA-based Matched Filter Group Optimisation for SKA Pulsar Search Engine
Haomiao Wang, Ben Stappers, Prabu Thiagaraj, Oliver Sinnen

TL;DR
This paper presents FPGA-based optimizations for matched filtering in the SKA pulsar search engine, analyzing design strategies for different filter sizes and comparing performance with GPUs.
Contribution
It introduces optimized FPGA designs for matched filtering, employing time-domain and Fourier-domain approaches, tailored for SKA pulsar search requirements.
Findings
Time-domain optimization uses LPT rule for filter distribution.
Fourier-domain analysis links memory use to speedup.
Arria 10 FPGA achieves comparable performance per watt to high-end GPUs.
Abstract
Pulsar search is one of the main tasks for the Square Kilometre Array (SKA), implemented in the central signal processor (CSP) sub-element. As most the characteristics of undiscovered pulsars are unknown by definition, exhaustive searches over a multi-dimensional parameter space are employed. One main compute-intensive task of the pulsar search modules in the CPS is the matched filter group, which convolves the input signals with a group of large FIR filters. High-performance designs on FPGAs have been proposed that can process multiple large filters efficiently. But given that in many applications, including the here targeted pulsar search, FIR filters have many different sizes, there is further potential for optimisation. This paper investigates the optimisation of matched filtering designs. While the results are tranferable to other domains, we are motivated by the needs of the SKA…
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