On the Role of Preprocessing and Memristor Dynamics in Reservoir Computing for Image Classification

TL;DR

This paper evaluates how memristor device characteristics influence reservoir computing performance in image classification, highlighting preprocessing strategies and robustness to device variability.

Contribution

It provides a comprehensive analysis of volatile memristor dynamics in RC, proposes data preprocessing methods, and demonstrates high accuracy and robustness on MNIST.

Findings

Achieves 95.89% accuracy on MNIST with memristor-based RC.

Maintains up to 94.2% accuracy under 20% device variability.

Analyzes device decay, quantization, and variability effects on reservoir performance.

Abstract

Reservoir computing (RC) is an emerging recurrent neural network architecture that has attracted growing attention for its low training cost and modest hardware requirements. Memristor-based circuits are particularly promising for RC, as their intrinsic dynamics can reduce network size and parameter overhead in tasks such as time-series prediction and image recognition. Although RC has been demonstrated with several memristive devices, a comprehensive evaluation of device-level requirements remains limited. In this paper, we analyze and explain the operation of a parallel delayed feedback network (PDFN) RC architecture with volatile memristors, focusing on how device characteristics -- such as decay rate, quantization, and variability -- affect reservoir performance. We further discuss strategies to improve data representation in the reservoir using preprocessing methods and suggest potential improvements. The proposed approach achieves 95.89% classification accuracy on MNIST, comparable with the best reported memristor-based RC implementations. Furthermore, the method maintains high robustness under 20% device variability, achieving an accuracy of up to 94.2%. These results demonstrate that volatile memristors can support reliable spatio-temporal information processing and reinforce their potential as key building blocks for compact, high-speed, and energy-efficient neuromorphic computing systems.