Enabling Mixed criticality applications for the Versal AI-Engines
Vincent Sprave, Martin Wilhelm, Daniele Passaretti, Alberto Garcia-Ortiz, Thilo Pionteck

TL;DR
This paper introduces a dynamic task dispatching system for AMD's Versal AI-Engine, enabling mixed criticality applications to efficiently utilize heterogeneous processing tiles with minimal overhead.
Contribution
It proposes a novel runtime infrastructure for dynamic task assignment on AIE tiles, overcoming static dataflow limitations for mixed criticality systems.
Findings
Reduced AIE idle time by 65.5% in autonomous driving workloads.
Overhead of task switching operations is less than 0.002%.
Doubled throughput of low-criticality tasks.
Abstract
Adaptive Systems-on-Chips (SoCs) are increasingly being used in mixed criticality systems (MCSs), such as in autonomous driving, aviation and medical systems. In this context, AMD has proposed the Versal SoC, which has a heterogeneous architecture including, among other components, an Artificial Intelligence Engine (AIE), which is a 2D array of processors and memory tiles designed for AI and signal processing workloads. While this AIE offers significant potential for accelerating real-time data processing tasks, this has not yet been explored in the context of MCSs since individual tasks with different criticality levels cannot be dynamically assigned to tiles due to the static mapping of dataflow graphs and tasks. In this work, we propose a dynamic task dispatching infrastructure that enables task switching on the AIE at runtime. Based on this infrastructure, we present an MCS design…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
