Ternary Memristive Logic: Hardware for Reasoning Realized via Domain Algebra

TL;DR

This paper introduces a novel hardware approach using ternary memristive crossbars to perform logical reasoning directly in hardware, mapping domain algebra to physical layout for efficient inference.

Contribution

It presents a new hardware architecture that encodes logical assertions in memristive junctions, enabling reasoning directly through physical wiring and domain algebra mapping.

Findings

Error-free operation over 100,000 trials per task

Physical layout embodies the domain algebra for reasoning

Enables wide-tolerance, three-valued logic inference in hardware

Abstract

Memristive crossbars store numerical weights needing aggregation and decoding; a single junction means nothing alone. This paper presents a fundamentally different use: each junction stores a complete, domain-scoped logical assertion (holds/negated/undefined). Ternary resistance states encode these values directly. We establish a structure-preserving mapping from a domain algebra to crossbar topology: domains become isolated arrays, specialization becomes directed wiring, relation typing controls inheritance gates, and cross-domain links become explicit registers. The physical layout thus embodies the algebra; changing wiring changes reasoning semantics. We detail an ICD-11 respiratory disease classification chip (1,247 entities, ~136k 1T1R junctions) enabling domain scoping, three-valued logic, transitive cascade, typed inheritance, and cross-axis queries. Behavioral simulation (sigma_log=0.15, SNR=20dB) shows error-free operation across 100,000 trials per task with wide tolerance margins. Where prior work unified representation and computation in software, this work unifies them in hardware: reading one junction answers one question, without symbolic interpretation.