PVAC: A RowHammer Mitigation Architecture Exploiting Per-victim-row Counting
Jumin Kim, Seungmin Baek, Hwayong Nam, Minbok Wi, Nam Sung Kim, Jung Ho Ahn

TL;DR
PVAC introduces a victim-based counting architecture for DRAM that improves RowHammer mitigation by aligning counters with physical disturbance mechanisms, reducing false alarms and enhancing performance.
Contribution
PVAC presents a novel victim-based counting mechanism with a dedicated counter subarray, enabling efficient, higher tolerance RowHammer mitigation without timing overhead.
Findings
PVAC achieves higher hammering tolerance than PRAC.
PVAC avoids spurious alerts in benign workloads.
PVAC reduces energy consumption and improves performance.
Abstract
As DRAM scaling exacerbates RowHammer, DDR5 introduces per-row activation counting (PRAC) to track aggressor activity. However, PRAC indiscriminately increments counters on every activation -- including benign refreshes -- while relying solely on explicit RFM operations for resets. Consequently, counters saturate even in an idle bank, triggering cascading mitigations and degrading performance. This vulnerability arises from a fundamental mismatch: PRAC tracks the aggressor but aims to protect the victim. We present Per-Victim-row hAmmered Counting (PVAC), a victim-based counting mechanism that aligns the counter semantics with the physical disturbance mechanism of RowHammer. PVAC increments the counters of victim rows, resets the activated row, and naturally bounds counter values under normal refresh. To enable efficient victim-based updates, PVAC employs a dedicated counter subarray…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
