A digitally controlled silicon quantum processing unit
Members of the HRL Quantum Team, Collaborators: Michael Abraham, Edwin Acuna, Tower S. Adams, Moonmoon Akmal, Matthew R. Alfaro, I. Alvarado, Jacob Amontree, Carter Andrews, Reed W. Andrews, Michael Antcliffe, Andre R. As\'encio, Ryan M. Avila Batres, Cynthia D. Baringer

TL;DR
This paper presents a scalable silicon-based quantum processing unit integrating custom cryogenic control, superconducting wiring, and high-density qubits, demonstrating significant performance improvements and error correction capabilities.
Contribution
It introduces a scalable quantum chip with integrated control and wiring, achieving high-performance qubits and implementing quantum error correction.
Findings
Demonstrated qubit performance improvements by an order of magnitude.
Implemented a distance-5 repetition code and an error-detecting code.
Validated system performance through detailed simulation comparisons.
Abstract
Commercially-relevant quantum computers will require large numbers of high-performing qubits that can be manufactured, integrated, and controlled at scale. Silicon exchange-only (EO) qubits are a strong candidate modality due to their control-signal simplicity and compatibility with advanced semiconductor manufacturing, but questions remain around the achievability of sufficiently low noise and a scalable control and wiring solution. Here we introduce a quantum processing unit composed of a custom-designed cryogenic CMOS controller, a novel high-density superconducting ribbon cable, and a low-noise EO qubit device. The quantum chip features a three-rail array of 54 exchange-coupled quantum dots, configurable to host up to 18 EO qubits. We integrate and use these components to demonstrate qubit performance for both single-qubit and entangling operations that advances the EO state of the…
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