A Unified Hardware-to-Decoder Architecture for Hybrid Continuous-Variable and Discrete-Variable Quantum Error Correction in LiDMaS+
Dennis Delali Kwesi Wayo, Chinonso Onah, Leonardo Goliatt, Sven Groppe

TL;DR
This paper introduces an integrated hardware-to-decoder architecture for hybrid quantum error correction, demonstrating complete replay integrity and analyzing decoder performance tradeoffs in a photonic GKP context.
Contribution
It presents a unified execution stack for hybrid CV and DV quantum error correction with comprehensive benchmarking and analysis of decoder behaviors and tradeoffs.
Findings
Replay integrity was complete with zero parse errors.
BP decoder reduced correction volume by ~50% compared to MWPM.
Decoder behavior is regime-dependent and dataset-driven.
Abstract
We present an architecture-level hardware-to-logical-to-decoder execution stack for hybrid continuous-variable and discrete-variable quantum error correction in LiDMaS+. Provider-native records are normalized into a single decoder IO contract and replayed under fixed controls across MWPM, UF, BP, and neural-MWPM. In a Xanadu case study using fixture inputs and sampled public datasets, replay integrity was complete: 108/108 fixture and 4000/4000 real-slice request-response lines, with zero request-parse errors, zero response-parse errors, and zero decoder-name mismatches. Under matched inputs, decoder behavior is clearly regime-dependent. For weighted fixture summaries, average flip count was 1.296 (MWPM), 1.296 (UF), 0.667 (BP), and 1.296 (neural-MWPM). For weighted real-data summaries, average flip count was 0.641 (MWPM), 0.741 (UF), 0.318 (BP), and 0.641 (neural-MWPM); corresponding…
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