Low-confinement silicon nitride waveguides manufactured via direct glass bonding

TL;DR

This paper introduces a cost-effective, scalable method for fabricating low-confinement silicon nitride waveguides using direct glass bonding, achieving low optical losses suitable for integrated photonics.

Contribution

The authors demonstrate a novel fabrication technique involving thermal fusion bonding of glass wafers with etched trenches filled with silicon nitride, enabling thick, symmetric dielectric cladding for low-loss waveguides.

Findings

Achieved up to 60% transmission at 1550 nm with 1 dB coupling loss.

Fabricated waveguides with 50 nm core height and 1.3–3.5 μm width.

Proposed method is low-cost, scalable, and suitable for long delay lines and ring resonators.

Abstract

Reduction of the fabrication cost of the photonic integral circuits with low optical losses and technological simplicity are the key conditions for their widespread implementation. In conventional manufacturing methods, dielectric cladding thickness around waveguides usually limited to ~20 {\mu}m, which complicates suppression of radiative losses and parasitic scattering. In this paper, we propose and experimentally demonstrate an alternative technology for forming low-confinement waveguides based on Borofloat 33 glass, based on thermal fusion bonding of two glass wafers. The waveguide pattern is formed in the following manner: trenches on the order of tens of nanometers are etched into the glass, then filled with silicon nitride, followed by removal of the excess layer and bonding, which ensures high-quality contact surfaces and a thick, symmetric dielectric cladding. As a proof of concept, we fabricated straight waveguides with a core height of 50 nm and widths from 1.3 to 3.5 {\mu}m. With butt coupling to standard SMF-28 single-mode fiber at a wavelength of 1550 nm, transmission of up to 60% was obtained, corresponding to input/output coupling losses of 1 dB per facet and consistent with numerical estimates. The proposed approach provides a low-cost and scalable route to fabricate low-confinement integrated photonic devices, promising for chips with simplified passive packaging and for devices based on long delay lines and ring resonators.