Demonstrating Record Fidelity for the Quantum Fourier Transform

TL;DR

This paper demonstrates a high-fidelity quantum Fourier transform on IBM hardware using the Parity Architecture, achieving record performance with 50 qubits and super-exponential speedup.

Contribution

It introduces the Parity Architecture for QFT, achieving record fidelity and qubit count, and shows how including iSWAP gates enhances scaling.

Findings

Achieved process fidelity of ~1% for 50 qubits on IBM Heron.

Demonstrated super-exponential scaling of the speedup with qubit number.

Including iSWAP gates further improves the scaling performance.

Abstract

We demonstrate the Parity Architecture on quantum hardware, using the quantum Fourier transform (QFT) as a benchmark. As a result, a record performance in both fidelity and qubit count is achieved using quantum processors with a native CZ-based instruction set. On the IBM Heron r3 chip, a process fidelity of the QFT algorithm of ${F \approx 10^{-2}}$ for ${N=50}$ qubits is achieved. The scaling of the speedup compared to previous swap-based methods is super-exponential $\mathcal{O}(\exp(N^2))$. Furthermore, we show that the scaling can be improved further by including iSWAP gates in the instruction set.