HARP: Hadamard-Domain Write-and-Verify for Noise-Robust RRAM Programming
Ilhuan Choi, Jiwon Yoo, Yoona Lee, Yewon Jeong, Jason Jaesung Lee, and Woo-Seok Choi

TL;DR
This paper introduces a Hadamard-domain write-and-verify framework for RRAM programming that significantly improves noise robustness, accuracy, and energy efficiency without additional analog hardware.
Contribution
It presents the first application of Hadamard-encoded verification to RRAM write-and-verify, enhancing reliability and efficiency under noisy conditions.
Findings
HD-PV and HARP limit accuracy loss to under 1% under severe noise.
They achieve up to 6.1x lower latency and 9.5x better energy efficiency compared to conventional methods.
HARP reduces uncorrelated read-noise variance by a factor of N.
Abstract
Write-and-verify (WV) is essential for programming multi-level RRAM weights, yet under scaled-voltage and low-SNR conditions the verify read increasingly limits mapping accuracy, convergence speed and energy. We propose a Hadamard-domain WV framework that improves verify reliability without adding analog hardware. % without introducing additional analog blocks % while leveraging the existing analog front-end \emph{HD-PV} (Hadamard-Encoded Parallel-Verify) replaces conventional one-hot verify reads with orthogonal Hadamard patterns for an -cell column. Changing the read basis without increasing the column-level read count, inverse Hadamard decoding reduces uncorrelated read-noise variance by a factor of and cancels common-mode disturbances. \emph{HARP} (Hadamard-based ADC-Energy-Reduced Parallel-Verify) further exploits the fact that WV needs only ternary update decisions, not…
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