Intent-aligned Formal Specification Synthesis via Traceable Refinement
Zhe Ye, Aidan Z.H. Yang, Huangyuan Su, Zhenyu Liao, Samuel Tenka, Zhizhen Qin, Udaya Ghai, Dawn Song, Soonho Kong

TL;DR
VeriSpecGen is a traceable refinement framework that synthesizes formal specifications from natural language requirements, enabling targeted repairs and improving synthesis accuracy significantly.
Contribution
It introduces a requirement-level attribution and localized repair approach for synthesizing intent-aligned specifications in Lean from natural language.
Findings
Achieved 86.6% accuracy on VERINA SpecGen task, outperforming baselines by up to 31.8 points.
Generated 343K training examples from refinement trajectories, boosting synthesis performance by 62-106%.
Demonstrated transfer of gains to general reasoning abilities.
Abstract
Large language models are increasingly used to generate code from natural language, but ensuring correctness remains challenging. Formal verification offers a principled way to obtain such guarantees by proving that a program satisfies a formal specification. However, specifications are frequently missing in real-world codebases, and writing high-quality specifications remains expensive and expertise-intensive. We present VeriSpecGen, a traceable refinement framework that synthesizes intent-aligned specifications in Lean through requirement-level attribution and localized repair. VeriSpecGen decomposes natural language into atomic requirements and generates requirement-targeted tests with explicit traceability maps to validate generated specifications. When validation fails, traceability maps attribute failures to specific requirements, enabling targeted clause-level repairs.…
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