A Self-Calibrating Framework for Analog Circuit Sizing Using LLM-Derived Analytical Equations

TL;DR

This paper introduces a self-calibrating design automation framework that uses LLM-derived analytical equations for analog circuit sizing, enabling interpretable, topology-specific, and process-portable solutions with minimal simulations.

Contribution

It presents a novel framework combining LLMs and calibration loops to generate interpretable, topology-specific analytical equations for analog circuit sizing that are portable across process nodes.

Findings

Framework converges in 2-7 simulations on various circuits.

Calibration captures process variations automatically, enabling cross-node portability.

Convergence depends on feedback architecture, not initial prediction accuracy.

Abstract

We present a design automation framework for analog circuit sizing that produces calibrated, topology-specific analytical equations from raw circuit netlists. A large language model (LLM) derives a complete Python sizing function in which each device dimension is traceable to a specific design rationale - a form of interpretable output absent from existing optimization-based and LLM-based sizing methods. A deterministic calibration loop extracts process-dependent parameters from a single DC operating point simulation, while a prediction-error feedback mechanism compensates for analytical inaccuracies. We validate the framework on circuits ranging from 8 to 30 transistors - spanning two-stage Miller-compensated, current-mirror, folded cascode, nested Miller-compensated, and complementary class-AB output topologies - across three process nodes (40 nm, 90 nm, 180 nm). On matched-specification benchmarks, including the class-AB opamp case, the framework converges in 2-7 simulations. Despite large initial prediction errors, convergence depends on the measurement-feedback architecture, not prediction accuracy. The one-shot calibration automatically captures process-dependent variations, enabling cross-node portability without modification, retraining, or per-process characterization.