Adaptive High-Speed Radar Signal Processing Architecture for 3D Localization of Multiple Targets on System on Chip

TL;DR

This paper introduces an adaptive 3D radar signal processing architecture on a System on Chip that enhances target localization speed and communication throughput in vehicular systems.

Contribution

It presents a novel reconfigurable RSP accelerator with adaptive switching between high and low complexity frameworks for improved performance.

Findings

Achieves up to 5.6x faster RSP compared to existing designs.

Provides a 24% increase in communication throughput.

Demonstrates effective adaptive reconfiguration based on SNR.

Abstract

Integrated Sensing and Communication (ISAC) is a key enabler of high speed, ultra low latency vehicular communication in 6G. ISAC leverages radar signal processing (RSP) to localize multiple unknown targets amid static clutter by jointly estimating range, azimuth, and Doppler velocity (3D), thereby enabling highly directional beamforming toward intended mobile users. However, the speed and accuracy of RSP significantly impact communication throughput. This work proposes a novel 3D reconfigurable RSP accelerator, implemented on a Zynq Multi processor System on Chip (MPSoC) using a hardware software codesign approach and fixed point optimization. We propose two RSP frameworks: (1) high accuracy and high complexity, and (2) low complexity and low accuracy, along with their respective architectures. Then, we develop an adaptive architecture that dynamically switches between these two frameworks based on the signal to clutter plus noise ratio. This adaptive reconfiguration achieves up to 5.6 times faster RSP compared to state of the art designs. At the system level, the proposed RSP based ISAC delivers a 24% improvement in communication throughput without increasing hardware complexity.