Physical Design of UET-RVMCU: A Streamlined Open-Source RISC-V Microcontroller

TL;DR

This paper details the design and implementation of UET-RVMCU, an open-source, lightweight RISC-V microcontroller optimized for embedded systems with a focus on simplicity and low area.

Contribution

It introduces a streamlined open-source RISC-V microcontroller derived from UETRV-PCore, with reduced complexity and open-source RTL-to-GDS flow for fabrication.

Findings

Successfully generated GDSII layout using open-source tools

Demonstrated feasibility of transforming an SoC into a microcontroller

Achieved low-area, simplified design suitable for embedded applications

Abstract

This paper presents the design and physical implementation of UET-RVMCU, a lightweight RISC-V microcontroller derived from the UETRV-PCore. Aimed at creating an accessible and flexible open-source RISC-V-based microcontroller, UET-RVMCU simplifies the application-class UETRV-PCore by reducing pipeline stages, removing MMU functionality, and integrating GPIO peripherals. The final GDSII layout was generated using an open-source RTL-to-GDS flow (OpenLane). This project demonstrates the feasibility of transforming an application-class SoC into a feature-rich microcontroller suitable for embedded systems, emphasizing low area, design simplicity, and open-source development.