VolTune: A Fine-Grained Runtime Voltage Control Architecture for FPGA Systems

TL;DR

VolTune introduces an open-source FPGA runtime voltage control system that dynamically adjusts supply voltages, significantly reducing power consumption while maintaining performance and reliability.

Contribution

It presents a novel FPGA-integrated architecture for runtime voltage tuning with hardware and software control paths, enabling energy-efficient operation.

Findings

Achieves 29.3% power reduction at 10 Gbps with BER up to 10^-6.

End-to-end voltage transition latency of 2.3 ms.

Controller adds less than 2% static power and FPGA resource overhead.

Abstract

The rapid emergence of edge computing platforms and large-scale data centers has made power efficiency a primary design constraint, particularly for data-intensive and AI-driven workloads. Field-programmable gate arrays (FPGAs) are increasingly adopted due to their flexibility and potential for energy-efficient acceleration. However, FPGA supply voltages are typically fixed at design time using conservative margins, limiting the ability to adapt power consumption to runtime conditions. This paper presents VolTune, an open-source runtime voltage control architecture that enables runtime tuning of FPGA supply voltages through FPGA-integrated control logic that abstracts low-level PMBus operations. VolTune provides both hardware-based and software-based control paths, allowing designers to balance deterministic low-latency operation against programmability. In the presented prototype, the hardware-based control path achieves a measured end-to-end voltage transition latency of 2.3 ms, while the controller adds under 2% static power overhead and under 2% FPGA resource overhead. As a representative case study, VolTune is evaluated on the GTX transceiver supply rail of a Kintex-7 platform. The results show that runtime voltage tuning exposes a bounded operating region with clear trade-offs between energy efficiency and reliability, and achieves up to approximately 29.3% rail-power reduction at 10.0 Gbps when allowing BER up to 10e-6. These results show that FPGA-integrated runtime voltage control can provide practical energy savings with low integration overhead.