VeRA+: Vector-Based Lightweight Digital Compensation for Drift-Resilient RRAM In-Memory Computing

TL;DR

VeRA+ is a lightweight, drift-aware compensation framework for RRAM in-memory computing that maintains high accuracy over long periods without extensive retraining or large storage overhead.

Contribution

It introduces a novel drift compensation method using shared projection matrices and compact vectors, enabling long-term accuracy without on-chip retraining.

Findings

Preserves up to 99.77% of drift-free accuracy after ten years of simulated drift.

Reduces storage overhead by over three orders of magnitude compared to BN-based calibration.

Achieves near-baseline accuracy under realistic device drift conditions.

Abstract

RRAM-based in-memory computing (IMC) offers high energy efficiency but suffers from conductance drift that severely degrades long-term accuracy. Existing approaches including retraining, noise-aware training, and Batch Normalization (BN)-based calibration either require RRAM rewriting, demand large storage overhead, or rely on online correction. We propose VeRA+, a lightweight drift compensation framework that reuses shared projection matrices and introduces only two compact drift-specific vectors per drift level. A drift-aware scheduling algorithm offline-trains a small set of VeRA+ parameters and selects the appropriate set over time without any on-chip retraining or data replay. VeRA+ preserves up to 99.77% of the drift-free accuracy after ten years of simulated drift and reduces storage overhead by more than three orders of magnitude compared with BN-based calibration. To validate VeRA+ under realistic device behavior, we extract one-week drift statistics from measurements on our fabricated 1T1R RRAM devices and use them to simulate realistic drifted weights. Under these measured drift conditions, VeRA+ achieves accuracy close to the drift-free baseline, providing an efficient and practical solution for long-term drift resilience in RRAM-IMC.