KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuits

TL;DR

KCLNet introduces an electrically-equivalence-oriented graph neural network framework for analog circuit representation learning, effectively capturing electrical constraints and improving downstream task performance.

Contribution

It proposes a novel graph neural network based on Kirchhoff's Current Law for analog circuits, enhancing generalization and preserving electrical properties.

Findings

Achieves high accuracy in analog circuit classification

Effective in subcircuit detection tasks

Improves circuit edit distance prediction

Abstract

Digital circuits representation learning has made remarkable progress in the electronic design automation domain, effectively supporting critical tasks such as testability analysis and logic reasoning. However, representation learning for analog circuits remains challenging due to their continuous electrical characteristics compared to the discrete states of digital circuits. This paper presents a direct current (DC) electrically equivalent-oriented analog representation learning framework, named \textbf{KCLNet}. It comprises an asynchronous graph neural network structure with electrically-simulated message passing and a representation learning method inspired by Kirchhoff's Current Law (KCL). This method maintains the orderliness of the circuit embedding space by enforcing the equality of the sum of outgoing and incoming current embeddings at each depth, which significantly enhances the generalization ability of circuit embeddings. KCLNet offers a novel and effective solution for analog circuit representation learning with electrical constraints preserved. Experimental results demonstrate that our method achieves significant performance in a variety of downstream tasks, e.g., analog circuit classification, subcircuit detection, and circuit edit distance prediction.