On-the-Fly ROM-Based Acceleration of SI-DSA for Implicit Time Marching of the Radiative Transfer Equation

TL;DR

This paper introduces an on-the-fly reduced-order-model acceleration technique for SI-DSA in implicit radiative transfer simulations, improving speed by 1.4 to 2 times without significant overhead.

Contribution

It develops a ROM-based acceleration method that constructs models directly from the kinetic formulation, bypassing diffusion approximations and exploiting low-rank structures during time marching.

Findings

Achieves 1.4x to 2.0x speedup over classical SI-DSA.

Constructs ROMs on-the-fly with minimal overhead.

Demonstrates consistent acceleration in numerical experiments.

Abstract

In implicit time marching of the radiative transfer equation (RTE), the resulting linear systems are commonly solved using source iteration with diffusion synthetic acceleration (SI-DSA). Despite its widespread success, the performance of the DSA preconditioner may deteriorate when the RTE cannot be well approximated by its diffusion limit. Moreover, classical SI-DSA does not exploit low-rank structures of the solution manifold across time steps when the solution evolves smoothly. To address these limitations, we develop an on-the-fly reduced-order-model (ROM)-based acceleration for SI-DSA in implicit time marching of the RTE. Instead of relying on a diffusion approximation, the proposed approach constructs ROMs directly from the underlying kinetic formulation while exploiting low-rank structures in the temporal evolution of the solution. The method is fully offline-free and constructs ROMs to enhance both initial guesses and preconditioners on the fly during time marching. To handle streaming solution data, we design efficient and memory-lean ROM construction and adaptive update strategies based on dynamical mode decomposition, incremental low-rank singular value decomposition, and error indicators. Numerical experiments demonstrate that the proposed method consistently accelerates implicit time marching, delivering $1.4\times$ to $2.0\times$ speedup over classical SI-DSA while incurring only marginal overhead for ROM construction and updates.