WarPGNN: A Parametric Thermal Warpage Analysis Framework with Physics-aware Graph Neural Network
Haotian Lu, Jincong Lu, Sachin Sachdeva, Sheldon X.-D. Tan

TL;DR
WarPGNN is a physics-aware graph neural network framework that enables fast, accurate, and transferable thermal warpage analysis for complex chiplet-based packages, significantly reducing computational costs compared to traditional FEM methods.
Contribution
This paper introduces WarPGNN, a novel GNN-based framework that combines physics-informed loss and hierarchical graph encoding for efficient and accurate thermal warpage prediction in chiplet systems.
Findings
Achieves over 205x speedup compared to 2D FEM methods.
Maintains 1.26% normalized RMSE in warpage prediction.
Demonstrates strong transferability across diverse datasets.
Abstract
With the advent of system-in-package (SiP) chiplet-based design and heterogeneous 2.5D/3D integration, thermal-induced warpage has become a critical reliability concern. While conventional numerical approaches can deliver highly accurate results, they often incur prohib- itively high computational costs, limiting their scalability for complex chiplet-package systems. In this paper, we present WarPGNN, an ef- ficient and accurate parametric thermal warpage analysis framework powered by Graph Neural Networks (GNNs). By operating directly on graphs constructed from the floorplans, WarPGNN enables fast warpage-aware floorplan exploration and exhibits strong transfer- ability across diverse package configurations. Our method first en- codes multi-die floorplans into reduced Transitive Closure Graphs (rTCGs), then a Graph Convolution Network (GCN)-based encoder extracts hierarchical…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
Topics3D IC and TSV technologies · VLSI and FPGA Design Techniques · Interconnection Networks and Systems
