Performance Analysis of Edge and In-Sensor AI Processors: A Comparative Review
Luigi Capogrosso, Pietro Bonazzi, Michele Magno

TL;DR
This paper reviews and benchmarks various ultra-low-power edge AI processors, comparing their architectures, performance, and energy efficiency to inform future design choices in in-sensor and edge computing.
Contribution
It provides a comprehensive architectural overview combined with empirical benchmarking of three representative edge AI processors across different paradigms.
Findings
IMX500 achieves highest utilization and lowest energy-delay product
GAP9 offers best energy efficiency within MCU-class power budgets
STM32N6 provides lowest latency with higher energy cost
Abstract
This review examines the rapidly evolving landscape of ultra-low-power edge processors, covering heterogeneous Systems-on-Chips (SoCs), neural accelerators, near-sensor and in-sensor architectures, and emerging dataflow and memory-centric designs. We categorize commercially available and research-grade platforms according to their compute paradigms, power envelopes, and memory hierarchies, and analyze their suitability for always-on and latency-critical Artificial Intelligence (AI) workloads. To complement the architectural overview with empirical evidence, we benchmark a 336 million Multiply-Accumulate (MAC) segmentation model (PicoSAM2) on three representative processors: GAP9, leveraging a multi-core RISC-V architecture augmented with hardware accelerators; the STM32N6, which pairs an advanced ARM Cortex-M55 core with a dedicated neural architecture accelerator; and the Sony IMX500,…
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Advanced Neural Network Applications · Embedded Systems Design Techniques
