Scalable optical neural network with nonlocally coupled coherent photonic processor

TL;DR

This paper introduces a scalable optical neural network architecture using nonlocally coupled coherent photonic processors, significantly reducing the number of active components needed for matrix-vector multiplication compared to traditional methods.

Contribution

The authors develop a novel nonlocal coupling approach with cascaded multiport directional couplers, enabling large-scale photonic neural networks with fewer phase shifters and active components.

Findings

Achieved a tenfold reduction in active components for a 32-input MVM chip.

Demonstrated the ability to perform matrix-vector multiplication with only 7N phase shifters.

Validated the approach on classification tasks, showing practical viability.

Abstract

Optical neural networks (ONNs) based on programmable photonic integrated circuits (PICs) offer a promising route toward low-latency and energy-efficient deep learning. However, conventional photonic implementations of matrix-vector multiplication (MVM) rely on locally connected architectures, such as Mach-Zehnder interferometer (MZI) meshes, whose number of active components scales quadratically with matrix size, severely limiting scalability. Here, we present a scalable ONN that overcomes this limitation by exploiting the intrinsically diffractive and nonlocal nature of coherent light inside a silicon photonic chip. Our approach employs cascaded stages of multiport directional couplers (MDCs) interleaved with compact phase-shifter arrays, enabling strong nonlocal coupling among multiple optical modes. We show that an MDC-based optical unitary converter (OUC) requires only $3N$ phase shifters to achieve uniform coverage over the $N$-dimensional complex unitary group, in stark contrast to the $O(N^2)$ scaling of conventional MZI meshes. Based on the singular value decomposition, we demonstrate that an $N\times N$ MVM can be realized using only $7N$ phase shifters, breaking the traditional $O(N^2)$ scaling barrier. We experimentally implement a 32-input silicon photonic MVM chip with a tenfold reduction in active components and validate its performance on various classification tasks. Our results establish a practical pathway toward large-scale, energy-efficient, and reconfigurable photonic neural networks.