High-performance syndrome extraction circuits for quantum codes
Armands Strikis, Dan E. Browne, Michael E. Beverland

TL;DR
This paper introduces a novel framework for designing syndrome-extraction circuits for quantum codes that reduces error propagation and improves logical performance, applicable to arbitrary CSS codes.
Contribution
It generalizes left-right syndrome-extraction circuits to all CSS codes, optimizes their structure, and introduces residual error metrics for better error analysis.
Findings
Achieves up to tenfold improvement in logical performance over existing designs.
Proves no non-interleaving SEC can reach circuit distance 12 for the gross code.
Identifies a circuit conjectured to surpass previous distance records.
Abstract
We present a fast and effective framework for analysing and designing syndrome-extraction circuits (SECs). Our approach is based on left-right circuits, a general design for SECs which maintain low depth by staggering and checks without interleaving gates. Initially proposed for specific classes of codes, we generalise this construction to arbitrary CSS codes and optimise the circuit structure to achieve low qubit idling time, large effective distance, and reduced minimum-weight failure mechanisms. A key component of our framework is the formal notion of residual errors and their associated distance metrics, which form lightweight tools for capturing error propagation and quantifying the potential harm of circuit-level errors. Applying our automated framework to diverse classes of codes, we observe consistent improvements in logical performance of up to an order of magnitude…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsQuantum Computing Algorithms and Architecture · Radiation Effects in Electronics · Low-power high-performance VLSI design
