QGPU: Parallel logic in quantum LDPC codes
Boren Gu, Andy Zeyi Liu, Armanda O. Quintavalle, Qian Xu, Jens Eisert, Joschka Roffe

TL;DR
This paper introduces clustered-cyclic quantum LDPC codes with a new parallel measurement protocol, enabling high parallelism and fault-tolerant logical operations, advancing scalable quantum error correction.
Contribution
It proposes clustered-cyclic codes with directly addressable logical bases and a parallel product surgery method, improving parallelism and fault-tolerance in quantum error correction.
Findings
Clustered-cyclic codes are competitive with state-of-the-art codes.
Parallel product surgery achieves surface-code-style maximal parallelism.
The approach preserves code distance and enables fault-tolerant logical gates.
Abstract
Quantum error correction is critical to the design and manufacture of scalable quantum computing systems. Recently, there has been growing interest in quantum low-density parity-check codes as a resource-efficient alternative to surface codes. Their adoption is hindered by the difficulty of compiling fault-tolerant logical operations. A key challenge is that logical qubits do not necessarily map to disjoint sets of physical qubits, which limits parallelism. We introduce clustered-cyclic codes, a quantum low-density parity-check code family with finite-size instances such as [[136,8,14]] and [[198,18,10]] that are competitive with state-of-the-art constructions. These codes admit a directly addressable logical basis, enabling highly parallel logical measurement layers. To leverage this structure, we propose parallel product surgery for quantum product codes. Using an auxiliary copy of…
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Taxonomy
TopicsQuantum Computing Algorithms and Architecture · Radiation Effects in Electronics · Quantum-Dot Cellular Automata
