A Digital Twin of the FPGA Digital Signal Processing Chain for MKIDs Readout: Root-Cause Analysis and Mitigation of Spurs

TL;DR

This paper presents a digital twin of an FPGA-based MKID readout system to identify and mitigate spurious signals caused by periodicity mismatches and filter limitations, improving system performance.

Contribution

We developed a cycle-accurate digital twin of the FPGA DSP chain to diagnose and mitigate spurs in MKID readout channels, enhancing understanding and performance.

Findings

Identified the origin of spurs as periodicity mismatches and filter limitations.

Implemented mitigation strategies that eliminate spurs with minimal resource increase.

Demonstrated improved readout channel quality through digital twin analysis.

Abstract

The KID_READOUT board, developed for the CONCERTO millimeter-wave astronomy instrument, implements FPGA-based digital frequency multiplexing to read out large arrays of Microwave Kinetic Inductance Detectors (MKIDs). The complexity of the implemented multirate DSP chain, which combines tones synthesis, interpolation, digital frequency translation, polyphase filter-bank (PFB) channelization, and digital down-conversion (DDC), makes analytical performance optimization difficult. To address this, we developed a cycle-and bitaccurate, Python-based digital twin of the FPGA readout firmware DSP chain. Using this model, we identified the origin of previously measured and unexplained spurs in the readout channels, tracing them to periodicity mismatches between the excitation and analysis paths and to insufficient suppression of negative-frequency components by the DDC filters. Based on these insights, we implemented a mitigation strategy that aligns the periodicities and improves the DDC filter characteristics, effectively eliminating the spurs with a minor increase in FPGA resource usage.