Heterogeneous Memory Design Exploration for AI Accelerators with a Gain Cell Memory Compiler

TL;DR

This paper introduces an OpenGCRAM compiler that supports heterogeneous on-chip memory systems combining SRAM and Gain Cell RAM, optimizing AI accelerator memory configurations for performance and energy efficiency.

Contribution

It presents a novel compiler tool for designing and characterizing heterogeneous memory systems with GCRAM and SRAM for AI accelerators.

Findings

Supports both SRAM and GCRAM in a unified compiler

Characterizes area, delay, and power for various configurations

Enables systematic optimization of memory systems for AI tasks

Abstract

As memory increasingly dominates system cost and energy, heterogeneous on-chip memory systems that combine technologies with complementary characteristics are becoming essential. Gain Cell RAM (GCRAM) offers higher density, lower power, and tunable retention, expanding the design space beyond conventional SRAM. To this end, we create an OpenGCRAM compiler supporting both SRAM and GCRAM. It generates macro-level designs and layouts for commercial CMOS processes and characterizes area, delay, and power across user-defined configurations. The tool enables systematic identification of optimal heterogeneous memory configurations for AI tasks under specified performance metrics.