LUTstructions: Self-loading FPGA-based Reconfigurable Instructions

TL;DR

This paper introduces LUTstruction, an FPGA architecture enabling self-loading, reconfigurable instructions in softcores, allowing efficient, low-latency custom instruction implementation directly from main memory.

Contribution

It presents a novel FPGA-based architecture for reconfigurable instructions that can be seamlessly loaded and executed without frequency overhead, with open-source code for further research.

Findings

Achieves low-latency custom instructions on FPGA

Supports wide reconfiguration without frequency penalty

Provides open-source implementation for research

Abstract

General-purpose processors feature a limited number of instructions based on an instruction set. They can be numerous, such as with vector extensions that include hundreds or thousands of instructions, but this comes at a cost; they are often unable to express arbitrary tasks efficiently. This paper explores the concept of having reconfigurable instructions by incorporating reconfigurable areas in a softcore. It follows a relatively new computing paradigm for seamlessly loading instruction implementation-carrying bitstreams from main memory. The resulting softcore is entirely evaluated on an FPGA, essentially having an FPGA-on-FPGA for the instruction implementations, with no notable operating frequency overhead. This is achieved with a custom FPGA architecture called LUTstruction, which is tailored towards low-latency for custom instructions and wide reconfiguration, as well as a soft implementation for the purposes of architectural exploration. All code is open-source to foster further research on reconfigurable instructions.