Towards Secure and Efficient DNN Accelerators via Hardware-Software Co-Design
Wei Xuan, Zihao Xuan, Rongliang Fu, Ning Lin, Kwunhang Wong, Zikang Yuan, Lang Feng, Zhongrui Wang, Tsung-Yi Ho, Yuzhong Jiao, Luhong Liang

TL;DR
This paper introduces a hardware-software co-designed framework for secure DNN accelerators that reduces overhead, improves energy efficiency, and maintains scalability through innovative cryptographic and authentication strategies.
Contribution
It proposes a bandwidth-aware cryptographic scheme and a multi-level authentication mechanism to enhance security and efficiency in DNN accelerators.
Findings
Over 12% performance overhead reduction
87% energy efficiency improvement
Robust scalability demonstrated
Abstract
The rapid deployment of deep neural network (DNN) accelerators in safety-critical domains such as autonomous vehicles, healthcare systems, and financial infrastructure necessitates robust mechanisms to safeguard data confidentiality and computational integrity. Existing security solutions for DNN accelerators, however, suffer from excessive hardware resource demands and frequent off-chip memory access overheads, which degrade performance and scalability. To address these challenges, this paper presents a secure and efficient memory protection framework for DNN accelerators with minimal overhead. First, we propose a bandwidth-aware cryptographic scheme that adapts encryption granularity based on memory traffic patterns, striking a balance between security and resource efficiency. Second, we observe that both the overlapping regions in the intra-layer tiling's sliding window pattern and…
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Taxonomy
TopicsPhysical Unclonable Functions (PUFs) and Hardware Security · Cryptographic Implementations and Security · Security and Verification in Computing
