Design Environment of Quantization-Aware Edge AI Hardware for Few-Shot Learning

TL;DR

This paper presents a design environment for edge AI hardware tailored for few-shot learning, emphasizing fixed-point quantization to maintain accuracy while reducing computational resource requirements.

Contribution

It introduces a versatile environment integrating Brevitas and Tensil for fixed-point quantization, enabling accuracy preservation with fewer bits in hardware implementations.

Findings

Accuracy comparable to floating-point with 6-bit quantization.

Quantization-aware training improves performance.

Potential for resource reduction in edge AI hardware.

Abstract

This study aims to ensure consistency in accuracy throughout the entire design flow in the implementation of edge AI hardware for few-shot learning, by implementing fixed-point data processing in the pre-training and evaluation phases. Specifically, the quantization module, called Brevitas, is applied to implement fixed-point data processing, which allows for arbitrary specification of the bit widths for the integer and fractional parts. Two methods of fixed-point data quantization, quantization-aware training (QAT) and post-training quantization (PTQ), are utilized in Brevitas. With Tensil, which is used in the current design flow, the bit widths of the integer and fractional parts need to be 8 bits each or 16 bits each when implemented in hardware, but performance validation has shown that accuracy comparable to floating-point operations can be maintained even with 6 bits or 5 bits each, indicating potential for further reduction in computational resources. These results clearly contribute to the creation of a versatile design and evaluation environment for edge AI hardware for few-shot learning.