Scalable Preparation of Matrix Product States with Sequential and Brick Wall Quantum Circuits

TL;DR

This paper presents a scalable framework for preparing Matrix Product States on quantum computers by combining heuristic and variational methods, optimizing circuit depth and gate count for large systems.

Contribution

It introduces an integrated pipeline that leverages heuristic initializations and variational optimization, with entanglement-based qubit reordering and low-level circuit optimizations for efficient MPS preparation.

Findings

Achieves high-fidelity MPS preparation for 19-50 qubits.

Reduces circuit depth by up to 50%.

Lowers CNOT count by 33%.

Abstract

Preparing arbitrary quantum states requires exponential resources. Matrix Product States (MPS) admit more efficient constructions, particularly when accuracy is traded for circuit complexity. Existing approaches to MPS preparation mostly rely on heuristic circuits that are deterministic but quickly saturate in accuracy, or on variational optimization methods that reach high fidelities but scale poorly. This work introduces an end-to-end MPS preparation framework that combines the strengths of both strategies within a single pipeline. Heuristic staircase-like and brick wall disentangler circuits provide warm-start initializations for variational optimization, enabling high-fidelity state preparation for large systems. Target MPSs are either specified as physical quantum states or constructed from classical datasets via amplitude encoding, using step-by-step singular value decompositions or tensor cross interpolation. The framework incorporates entanglement-based qubit reordering, reformulated as a quadratic assignment problem, and low-level optimizations that reduce depths by up to 50% and CNOT counts by 33%. We evaluate the full pipeline on datasets of varying complexity across systems of 19-50 qubits and identify trade-offs between fidelity, gate count, and circuit depth. Optimized brick wall circuits typically achieve the lowest depths, while the optimized staircase-like circuits minimize gate counts. Overall, our results provide principled and scalable protocols for preparing MPSs as quantum circuits, supporting utility-scale applications on near-term quantum devices.