Reed-Muller Error-Correction Code Encoder for SFQ-to-CMOS Interface Circuits

TL;DR

This paper presents a lightweight Reed-Muller error-correction encoder for SFQ-to-CMOS interfaces, improving data integrity in superconducting digital electronics by correcting errors caused by flux trapping, PPV, and defects.

Contribution

A novel SFQ-based RM(1,3) encoder design that detects and corrects multiple errors, with a simulation framework analyzing its performance and robustness.

Findings

Encoder improves no-error probability by 6.7% under ±20% PPV.

Can correct all errors with at least 99.1% probability at lower PPV.

Studied impact of fabrication defects on encoder performance.

Abstract

Data transmission from superconducting digital electronics such as single flux quantum (SFQ) logic to semiconductor (CMOS) circuits is subject to bit errors due to, e.g., flux trapping, process parameter variations (PPV), and fabrication defects. In this paper, a lightweight hardware-efficient error-correction code encoder is designed and analyzed. Particularly, a Reed-Muller code RM(1,3) encoder is implemented with SFQ digital logic. The proposed RM(1,3) encoder converts a 4-bit message into an 8-bit codeword and can detect and correct up to 3- and 1-bit errors, respectively. This encoder circuit is designed using MIT-LL SFQ5ee process and SuperTools/ColdFlux RSFQ cell library. A simulation framework integrating JoSIM simulator and MATLAB script for automated data collection and analysis, is proposed to study the performance of RM(1,3) encoder. The proposed encoder improves the probability of having no bit errors by 6.7% as compared to an encoder-less design under $\pm20\%$ PPV. With $\pm15\%$ and lower PPV, the proposed encoder could correct all errors with at least 99.1% probability. The impact of fabrication defects such as open circuit faults on the encoder circuit is also studied using the proposed framework.