DRAMPyML: A Formal Description of DRAM Protocols with Timed Petri Nets

TL;DR

This paper introduces DRAMPyML, a formal, executable model of DRAM protocols using timed Petri nets and Python, improving understanding, verification, and evaluation of complex memory standards.

Contribution

It presents an evolved modeling approach with timed Petri nets for DRAM protocols, capturing parallel operations and enabling direct execution and analysis.

Findings

Enhanced accuracy in DRAM protocol modeling

Facilitates verification of controllers and simulators

Enables evaluation of protocol metrics

Abstract

The JEDEC committee defines various domain-specific DRAM standards. These standards feature increasingly complex and evolving protocol specifications, which are detailed in timing diagrams and command tables. Understanding these protocols is becoming progressively challenging as new features and complex device hierarchies are difficult to comprehend without an expressive model. While each JEDEC standard features a simplified state machine, this state machine fails to reflect the parallel operation of memory banks. In this paper, we present an evolved modeling approach based on timed Petri nets and Python. This model provides a more accurate representation of DRAM protocols, making them easier to understand and directly executable, which enables the evaluation of interesting metrics and the verification of controller RTL models, DRAM logic and memory simulators.