High-performance Vector-length Agnostic Quantum Circuit Simulations on ARM Processors

TL;DR

This paper explores vector-length agnostic design for quantum state-vector simulations on ARM processors, achieving significant speedups through optimized techniques and providing insights for future portable high-performance quantum computing implementations.

Contribution

It introduces a VLA design and optimization techniques for quantum simulations, demonstrating portability and performance improvements across multiple ARM-based processors.

Findings

Up to 4.5x speedup on A64FX

Up to 2.5x speedup on Grace

Up to 1.5x speedup on Graviton

Abstract

ARM SVE and RISC-V RVV are emerging vector architectures in high-end processors that support vectorization of flexible vector length. In this work, we leverage an important workload for quantum computing, quantum state-vector simulations, to understand whether high-performance portability can be achieved in a vector-length agnostic (VLA) design. We propose a VLA design and optimization techniques critical for achieving high performance, including VLEN-adaptive memory layout adjustment, load buffering, fine-grained loop control, and gate fusion-based arithmetic intensity adaptation. We provide an implementation in Google's Qsim and evaluate five quantum circuits of up to 36 qubits on three ARM processors, including NVIDIA Grace, AWS Graviton3, and Fujitsu A64FX. By defining new metrics and PMU events to quantify vectorization activities, we draw generic insights for future VLA designs. Our single-source implementation of VLA quantum simulations achieves up to 4.5x speedup on A64FX, 2.5x speedup on Grace, and 1.5x speedup on Graviton.