Accelerating Post-Quantum Cryptography via LLM-Driven Hardware-Software Co-Design

TL;DR

This paper demonstrates how Large Language Models can significantly accelerate the hardware-software co-design process for post-quantum cryptography, specifically FALCON, by automating FPGA accelerator development and achieving notable speedups.

Contribution

It introduces a novel LLM-driven framework for analyzing PQC algorithms and generating FPGA hardware descriptions, improving design efficiency and performance.

Findings

LLM-driven synthesis achieves up to 2.6x speedup in kernel execution

Accelerators have shorter critical paths compared to conventional methods

LLMs reduce design effort and development time for PQC FPGA accelerators

Abstract

Post-quantum cryptography (PQC) is crucial for securing data against emerging quantum threats. However, its algorithms are computationally complex and difficult to implement efficiently on hardware. In this paper, we explore the potential of Large Language Models (LLMs) to accelerate the hardware-software co-design process for PQC, with a focus on the FALCON digital signature scheme. We present a novel framework that leverages LLMs to analyze PQC algorithms, identify performance-critical components, and generate candidate hardware descriptions for FPGA implementation. We present the first quantitative comparison between LLM-driven synthesis and conventional HLS-based approaches for low-level compute-intensive kernels in FALCON, showing that human-in-the-loop LLM-generated accelerators can achieve up to 2.6x speedup in kernel execution time with shorter critical paths, while highlighting trade-offs in resource utilization and power consumption. Our results suggest that LLMs can minimize design effort and development time by automating FPGA accelerator design iterations for PQC algorithms, offering a promising new direction for rapid and adaptive PQC accelerator design on FPGAs.