Physical Analog Kolmogorov-Arnold Networks based on Reconfigurable Nonlinear-Processing Units

TL;DR

This paper presents a novel hardware implementation of Kolmogorov-Arnold Networks using reconfigurable nonlinear-processing units, enabling efficient, low-energy, and compact analog neural networks suitable for edge inference.

Contribution

Introduction of a physical analog KAN architecture utilizing RNPUs for efficient nonlinear computation, demonstrating hardware feasibility and superior energy and area efficiency.

Findings

Accurate function approximation with fewer parameters than MLPs

Energy per inference of ~250 pJ and latency of ~600 ns

10^2-10^3 times reduction in energy and 10 times in area compared to digital MLPs

Abstract

Kolmogorov-Arnold Networks (KANs) shift neural computation from linear layers to learnable nonlinear edge functions, but implementing these nonlinearities efficiently in hardware remains an open challenge. Here we introduce a physical analog KAN architecture in which edge functions are realized in materia using reconfigurable nonlinear-processing units (RNPUs): multi-terminal nanoscale silicon devices whose input-output characteristics are tuned via control voltages. By combining multiple RNPUs into an edge processor and assembling these blocks into a reconfigurable analog KAN (aKAN) architecture with integrated mixed-signal interfacing, we establish a realistic system-level hardware implementation that enables compact KAN-style regression and classification with programmable nonlinear transformations. Using experimentally calibrated RNPU models and hardware measurements, we demonstrate accurate function approximation across increasing task complexity while requiring fewer or comparable trainable parameters than multilayer perceptrons (MLPs). System-level estimates indicate an energy per inference of $\sim$250 pJ and an end-to-end inference latency of $\sim$600 ns for a representative workload, corresponding to a $\sim$10$^{2}$-10$^{3}\times$ reduction in energy accompanied by a $\sim$10$\times$ reduction in area compared to a digital fixed-point MLP at similar approximation error. These results establish RNPUs as scalable, hardware-native nonlinear computing primitives and identify analog KAN architectures as a realistic silicon-based pathway toward energy-, latency-, and footprint-efficient analog neural-network hardware, particularly for edge inference.