Learning Compact Boolean Networks

TL;DR

This paper introduces novel methods for learning compact, accurate Boolean networks suitable for resource-constrained environments, demonstrating significant improvements over prior approaches in accuracy, efficiency, and latency.

Contribution

It presents three new techniques: a parameter-free connection learning strategy, a compact convolutional Boolean architecture, and an adaptive discretization process.

Findings

Achieves higher accuracy with up to 47x fewer Boolean operations.

Surpasses prior state-of-the-art in accuracy and runtime on FPGA for MNIST.

Generates circuits that are 7x smaller while maintaining high performance.

Abstract

Floating-point neural networks dominate modern machine learning but incur substantial inference costs, motivating emerging interest in Boolean networks for resource-constrained deployments. Since Boolean networks use only Boolean operations, they can achieve nanosecond-scale inference latency. However, learning Boolean networks that are both compact and accurate remains challenging because of their discrete, combinatorial structure. In this work we address this challenge via three novel, complementary contributions: (i) a new parameter-free strategy for learning effective connections, (ii) a novel compact convolutional Boolean architecture that exploits spatial locality while requiring fewer Boolean operations than existing convolutional kernels, and (iii) an adaptive discretization procedure that reduces the accuracy drop incurred when converting a continuously relaxed network into a discrete Boolean network. Across standard vision benchmarks, our method improves the Pareto frontier over prior state-of-the-art methods, achieving higher accuracy with up to $47\times$ fewer Boolean operations. This advantage also extends to other modalities. Further, on an FPGA, our model on MNIST achieves 99.38\% accuracy with 6.48 ns latency, surpassing the prior state-of-the-art in both accuracy and runtime, while generating a $7\times$ smaller circuit. Code and models are available at https://github.com/eth-sri/CompactLogic.