Semantic Consensus Decoding: Backdoor Defense for Verilog Code Generation
Guang Yang, Xing Hu, Xiang Chen, Xin Xia

TL;DR
This paper introduces Semantic Consensus Decoding, a passive inference-time defense mechanism for Verilog code generation models that significantly reduces backdoor attack success rates by focusing on functional requirements.
Contribution
The paper proposes a novel passive defense method that extracts functional requirements and adaptively fuses output distributions to detect and suppress malicious triggers in hardware design code.
Findings
Reduces attack success rate from 89% to under 3%.
Maintains high quality of generated code.
Effective against multiple backdoor attack types.
Abstract
Large language models (LLMs) for Verilog code generation are increasingly adopted in hardware design, yet remain vulnerable to backdoor attacks where adversaries inject malicious triggers during training to induce vulnerable hardware designs. Unlike patchable software vulnerabilities, hardware trojans become irreversible once fabricated, making remediation extremely costly or impossible. Existing active defenses require access to training data, impractical for third-party LLM users, while passive defenses struggle against semantically stealthy triggers that naturally blend into design specifications. In this paper, we hypothesize that under the requirements of both effectiveness and stealthiness, attackers are strongly biased toward embedding triggers in non-functional requirements (e.g., style modifiers, quality descriptors) rather than functional specifications that determine hardware…
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Taxonomy
TopicsAdversarial Robustness in Machine Learning · Advanced Malware Detection Techniques · Security and Verification in Computing
