A Comparative Study of Digital Memristor-Based Processing-In-Memory from a Device and Reliability Perspective

TL;DR

This paper reviews recent advances in memristor-based processing-in-memory technologies, focusing on device types, reliability challenges, and device-level optimization to enable scalable, reliable PIM systems.

Contribution

It provides a comprehensive comparison of memristive device types and logic techniques, highlighting reliability issues and optimization strategies for scalable PIM applications.

Findings

Device reliability metrics vary across memristive technologies.

Device-level optimization is crucial for scalable PIM systems.

Trade-offs exist between different memristive device stacks.

Abstract

As data-intensive applications increasingly strain conventional computing systems, processing-in-memory (PIM) has emerged as a promising paradigm to alleviate the memory wall by minimizing data transfer between memory and processing units. This review presents the recent advances in both stateful and non-stateful logic techniques for PIM, focusing on emerging nonvolatile memory technologies such as resistive random-access memory (RRAM), phase-change memory (PCM), and magnetoresistive random-access memory (MRAM). Both experimentally demonstrated and simulated logic designs are critically examined, highlighting key challenges in reliability and the role of device-level optimization in enabling scalable and commercial viable PIM systems. The review begins with an overview of relevant logic families, memristive device types, and associated reliability metrics. Each logic family is then explored in terms of how it capitalizes on distinct device properties to implement logic techniques. A comparative table of representative device stacks and performance parameters illustrates trade-offs and quality indicators. Through this comprehensive analysis, the development of optimized, robust memristive devices for next-generation PIM applications is supported.