PCIe400 generic readout board qualification test

TL;DR

The paper presents the qualification results of the PCIe400 readout board, demonstrating high-bandwidth data transfer and deterministic clock distribution for future high-energy physics experiments like LHCb Upgrade II.

Contribution

It introduces a technological demonstrator board with advanced interfaces and phase-deterministic clock distribution tailored for high-throughput physics experiments.

Findings

Successful qualification of high-bandwidth interfaces including QSFP112 links.

Demonstration of phase-deterministic clock distribution with <10 ps accuracy.

Validation of the PCIe400 board for high-energy physics data acquisition needs.

Abstract

The PCIe400 is a generic readout board designed for high-throughput data acquisition in future high-energy physics experiments. It interfaces up to 48 bidirectional links supporting custom protocols from 1 to 26 Gbps to modern back-end systems providing up to 400 Gbps bandwidth.The board is developed as a technological demonstrator for the LHCb Upgrade II, which foresees an aggregated throughput of approximately 200 Tbps. In addition to increased bandwidth, the PCIe400 targets deterministic clock distribution to front-end electronics. At a maximum instantaneous luminosity of $1.5~\times~10^{34}~cm^{-2}s^{-1}$, up to 40 proton-proton interactions per bunch crossing are expected in LHCb Upgrade II. The adoption of 4D tracking detectors with time resolutions down to 20 ps motivates clock distribution with phase determinism below 10 ps peak-to-peak across large-scale systems exceeding 2000 nodes. This paper presents the qualification of the PCIe400 prototype board, focusing on high-bandwidth interfaces, including next-generation QSFP112 links, and phase-deterministic clock distribution.