Deep Learning-Based Early-Stage IR-Drop Estimation via CNN Surrogate Modeling
Ritesh Bhadana

TL;DR
This paper introduces a CNN-based surrogate model for rapid early-stage IR-drop estimation in VLSI design, enabling fast and accurate IR-drop heatmap predictions to assist early design decisions.
Contribution
It presents a novel U-Net-based deep learning framework trained on synthetic data for efficient IR-drop prediction, reducing reliance on costly physics-based signoff tools during early design phases.
Findings
Accurately predicts IR-drop heatmaps with millisecond inference time.
Outperforms traditional methods in speed while maintaining high accuracy.
Provides a practical tool for early-stage power integrity analysis.
Abstract
IR-drop is a critical power integrity challenge in modern VLSI designs that can cause timing degradation, reliability issues, and functional failures if not detected early in the design flow. Conventional IR-drop analysis relies on physics-based signoff tools, which provide high accuracy but incur significant computational cost and require near-final layout information, making them unsuitable for rapid early-stage design exploration. In this work, we propose a deep learning-based surrogate modeling approach for early-stage IR-drop estimation using a CNN. The task is formulated as a dense pixel-wise regression problem, where spatial physical layout features are mapped directly to IR-drop heatmaps. A U-Net-based encoder-decoder architecture with skip connections is employed to effectively capture both local and global spatial dependencies within the layout. The model is trained on a…
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Taxonomy
TopicsLow-power high-performance VLSI design · VLSI and FPGA Design Techniques · Embedded Systems Design Techniques
