A biased-erasure cavity qubit with hardware-efficient quantum error detection
Jiasheng Mai, Qiyu Liu, Xiaowei Deng, Yanyan Cai, Zhongchu Ni, Libo Zhang, Ling Hu, Pan Zheng, Song Liu, Yuan Xu, Dapeng Yu

TL;DR
This paper demonstrates a hardware-efficient biased-erasure qubit in a microwave cavity with high erasure bias, low logical error rates, and potential for fault-tolerant quantum computing through effective error detection and postselection.
Contribution
The work introduces a novel biased-erasure qubit in a microwave cavity with high erasure bias ratio and integrated error detection, advancing hardware-efficient quantum error correction.
Findings
Erasure bias ratio exceeds 265.
Logical state errors below 1%.
Effective logical relaxation and dephasing rates surpass physical error rates.
Abstract
Erasure qubits are beneficial for quantum error correction due to their relaxed threshold requirements. While dual-rail erasure qubits have been demonstrated with a strong error hierarchy in circuit quantum electrodynamics, biased-erasure qubits -- where erasures originate predominantly from one logical basis state -- offer further advantages. Here, we realize a hardware-efficient biased-erasure qubit encoded in the vacuum and two-photon Fock states of a single microwave cavity. The qubit exhibits an erasure bias ratio of over 265. By using a transmon ancilla for logical measurements and mid-circuit erasure detections, we achieve logical state assignment errors below 1% and convert over 99.3% leakage errors into detected erasures. After postselection against erasures, we achieve effective logical relaxation and dephasing rates of and ,…
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Taxonomy
TopicsQuantum Information and Cryptography · Quantum Computing Algorithms and Architecture · Quantum and electron transport phenomena
